********************************************************* * This firmware is for the following products: * * -------------------------------------------- * * 7750SRG-HD * ********************************************************* Version 3.03 build 21 - (September 5, 2006) ------------------------------------------- - Added support for 720p/50 with setting #4 (DIP switches 1-5 = ON,ON,OFF,OFF,OFF) #4, ON ON OFF OFF OFF, 1080i/50, 720p/50, 625i/50, 625i/50, PAL, Phase, 1,2,3,4 - Correction to Horizontal and Vertical phasing controls - Divisor LED now on for standard #27 Version 3.2 build 11 - (February 4, 2003) ----------------------------------------- - Fix for genlock issue on dip selection #27 Version 3.2 build 3 - (November 30, 2002) ----------------------------------------- - Added setting #29, 1080p25, 1080i/50, 625i50, 625i50 all locked to PAL Version 3.1 build 2 - (April 30, 2002) -------------------------------------- - added new settings: #27 Off On Off On On 1080i/59.94 1080p/23.98sF 525i/59.94 6 Hz NTSC Phase 1 #28 On On Off On On 1080i/59.94 1080p/23.98sF 525i/23.98F 6 Hz NTSC Phase 1 Version 3.0 build 1 - (February 25, 2002) ----------------------------------------- - Added Datalink transfer standards - Addressed issue regarding NTSC genlock input and H phasing Version 2.2 build 3 - (March 12, 2001) -------------------------------------- - an additional output combination has been added to support: 1080p/24 1080p/24sf 625i/48 625i/48 clock locked to PAL This is on output combination # 21 with dips 1 to 5: OFF, OFF, ON, OFF,ON Version 2.1 build 12 - (November 15, 2000) ------------------------------------------ - with this firmware the outputs will always have a consistent phase with respect to each other when genlock is not present - can now be used in free-run mode with all dip switch selectable output options Version 2.1 build 3 - (August 15, 2000) --------------------------------------- - support for XCV100 Version 2.0 build 9 - (July 26, 2000) ------------------------------------- - 6Hz pulse width reduced from ~30mS to ~15mS (~<1 field) - phasing between the reference and output 1 have been changed so that the broad pulses are lined up - random output phase jitter has been fixed - added H&V phasing - additional dip switch selection added that provides a 1080i/60 V drive on output 1. Version 1.3 build 16 - (May 4, 2000) ------------------------------------ - correct output phase alignment between the input reference and Output 1 Version 1.2 build 4 - (April 26, 2000) -------------------------------------- - first release